Gouranga Dey
RTL Design • ASIC Engineer • SoC Designer
- Role
- Silicon Front-end Engineer at Microsoft
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Gouranga Dey
I am a Hardware Design Engineer, passionate about Circuit Design, with five years of experience in Systems and Circuit Design. I am working on IP design and SoC integration. I have expertise in RTL coding, CSR, LINT, CDC, Synthesis, STA, LEC, DFT, UPF, Power Analysis, and FPGA. Skill: Microarchitecture, Logic Design, IP Design, SoC IntegrationLanguage: Verilog, SystemVerilog, SystemRDL, Python, TCL, Shell Script, Perl, UVM, C, C++, SQLTools: VC SpyGlass, Design Compiler, Fusion Compiler, Primetime, Formality, Primepower, VCS, Verdi, RTLA, CSR compiler, coreConsultant, coreAssembler, Testmax Advisor, Magillem, Library Compiler, ARM memory compiler, OrCAD, Modelsim, LT Spice, Matlab, Vivado, ISEI have worked on Analog, Digital, Mixed-Signal, and Power Electronics Circuit Design and High-Speed Multi-board System Design: Circuit Design, Schematic Capture, Layout Instruction, Testing, Debugging, and EMI/EMC.
Experience
Silicon Front-end Engineer
Aug 2024 — Present · Bengaluru, IN
Working on IP Design and Integration CSR - System RDL, RTL Coding, Integration - Magillem, LINT, CDC, RDC, UPF, Power Analysis, Synthesis, LEC, STA, DFT
Education
Kalyani Government Engineering College
Bachelor of Technology - BTech, Electronics and Communications Engineering
2009 — 2013
Indian Institute of Technology, Bombay
Master of Technology - MTech, Electronic Systems
2018 — 2020
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