Ganesh Gore

Principal Engineer @Quicklogic Corporation

Salt Lake City, UT, US
EMAILS
g••••@quicklogic.com
MOBILE NUMBERS
+18•••••••02

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WORK HISTORY

Mar 2023 — Present

Principal Engineer @Quicklogic Corporation

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Salt Lake City, UT, US

Architect efficient eFPGA design workflows to support custom and domain-specific programmable architectures- Explore FPGA architectures for custom and domain-specific applications- Lead end-to-end tapeouts for commercial chips, from RTL generation through physical implementation and sign-off- Contribute to, integrate, and maintain toolchains and workflows (OpenFPGA, VPR, OpenFPGA-Physical, Spydrne-Physical) to streamline design flows- Contribute to company product strategy and roadmap, translating market and customer requirements into technical direction and planning feature development- Provide cross-functional technical leadership and management, shaping design decisions, mentoring engineers, and ensuring product implementation aligns with strategic goals.

EDUCATION

2009 — 2012

Vivekananda Institute of Technology

Bachelor of Engineering (BE), Electronics Engineering

2013 — 2016

Indian Institute of Technology, Bombay

Master of Technology (MTech), Electrical and Electronics Engineering

2005 — 2009

L&T INSTITUTE OF TECHNOLOGY

Diploma, Electronics & Telecommunication Engineering

N/A

University of Utah

Doctor of Philosophy - PhD, Electrical and Electronics Engineering

SKILLS

EagleZynqWeb DevelopmentC++PythonDevice ModelingDjangoSpiceAvr StudioEagle PcbKeilXilinx IsePcb DesignEmbedded SystemsCadenceProteusVerilog-aArm ArchitectureVivadoRestful WebservicesModelsimVerilogScriptingCircuit DesignCadence Virtuoso

ABOUT GANESH GORE

With over 2.5 years as Principal Engineer at QuickLogic Corporation, I specialize in architecting efficient eFPGA workflows and exploring domain-specific programmable architectures. My work spans end-to-end commercial chip tapeouts, from RTL generation to physical implementation and sign-off. I bring expertise in integrating and maintaining open-source VLSI EDA toolchains such as OpenFPGA and VPR, enhancing design flow efficiency, reducing cycle times, and optimizing costs. My mission includes translating market and customer needs into actionable product strategies, driving feature development, and mentoring cross-functional engineering teams. With a strong foundation in numerical analysis, scientific programming, and reprogrammable devices, I deliver technical leadership that shapes innovative solutions and drives organizational success. Open to consulting and collaborative opportunities in FPGA and eFPGA domains.

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