Gnan Raj Talla

Physical Design Methodology Engineer at Intel I Ex-Synopsys

Role
Physical Design Methodology Engineer at Intel
Location
Hyderabad, TG, IN
LinkedIn followers
500 followers

About Gnan Raj Talla

Physical Design Engineer with 7+ years of experience in Block level implementation for…

Experience

  1. Physical Design Methodology Engineer

    Intel

    Jul 2024 — Present · Bengaluru, IN

Education

  • Motilal Nehru National Institute Of Technology

    M.Tech

    2017 — 2019

  • Saint Joseph High School

    High School

    1998 — 2010

  • Osmania University

    Engineer's Degree

    2012 — 2016

  • Sri Chaitanya Junior Kalasala

    Associate’s Degree

    2010 — 2012

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Gnan Raj Talla — Physical Design Methodology Engineer at Intel in Hyderabad, TG, IN | Unifers