Giuseppe Solano
Principal Engineer @Arm
Cambridge, GB
EMAILS
MOBILE NUMBERS
+91 *********19
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WORK HISTORY
Oct 2023 — Present
Principal Engineer @Arm
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Cambridge, GB
Low Power ExpertSolution Engineering Team
EDUCATION
1992 — 1999
Universita' di Catania
Software Engineering
SKILLS
Design CompilerAssembly LanguageAtpgSynopsys PrimetimeCmosFormalitySemiconductorsTestingTsmc 16ff+ElectronicsTcl-TkFloorplanningStarxtractIcPowerartistClocktreeRedhawkSemiconduttoriQuantusIcc SynopsysDigital Signal ProcessorsPower ConsumptionComputer NetworksVoltusElectronic Design AutomationCalibreVhdlStm Fdsoi 14nmPerl ScriptVerilogAwkPerlComputer ArchitectureParasitic ExtractionTiming ClosureDigital Signal ProcessorFieldbusUpf/CpfProgettazione Di Circuiti IntegratiDigital Circuit Design
ABOUT GIUSEPPE SOLANO
Digital Implementation ExpertComplete Chip Implementation from RTL through to GDS2 on a variety of processes down to 5nmEDA Vendor liaison: Driving vendors to supply the solution neededSpecialities: Synthesis, Low Power Management Technique, Floorplanning, Power Grid Architecture, Power Analysis, P&R, Timing closure, Formal checks, Physical Verification, Design For Manufacture Technique, Reduce Time to Market.
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