Girish Deshpande
ASIC Physical Design Methodology @ NVIDIA
- Role
- Sr Asic Engineer at NVIDIA
- Location
- Santa Clara, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Sr Asic Engineer
Oct 2016 — Present · Santa Clara, US
PI methodology/ EM and IR sign off flows for NVIDIA’s chip design and implementation teams.
Skills
- Eda
- Embedded Systems
- Algorithms
- Cad/Physical Design Automation
- Fpgas
- Computer Architecture
- Modelsim
- Programming
- Network Programming
- Unix
- Linux
- Vlsi
- Fpga
- Testing
- Tcp/Ip
- Field-Programmable Gate Arrays (Fpga)
- Software Development
- Vhdl
- Verilog
- Logic Synthesis and Verification
- Very-Large-Scale Integration (Vlsi)
- C
- Matlab
- Perl
- C++
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