Girish N.
Design Verification Engineer, Qualcomm.
- Role
- Senior Staff Engineer at 高通
- Location
- San Diego, CA, US
- LinkedIn followers
- 500 followers
About Girish N.
Extensive experience in Constrained Random & Coverage driven functional verification.>> Functional verification experience at Unit / Block level, Sub-system level and SoC level.>> Longstanding experience in developing verification environments with UVM and System verilog.>> Good understanding of building scratch-up testbenches and UVCs>> Experience in Bluetooth Classic, Bluetooth Low Energy and Ultra Wide Band MAC Layer verification.>> Acquainted with Camera Image Processing.SKILL SET Hardware Languages : System Verilog, Verilog, Specman/e. Methodologies : UVM, OVM, eRM.Expertise : Functional Simulation. Protocol : Bluetooth Classic [BTC], Bluetooth Low Energy [BLE], Ultra Wide Band [UWB], AMBA AHB, AXI, APBEDA Simulation Tools : VCS, DVE, NCSIM Waveform Debug : Verdi, SimvisionVersion Control Tool : Clear CaseIssue/Bug Tracking : JIRA, ClearQuest
Experience
Senior Staff Engineer
Oct 2022 — Present · San Diego, CA, US
Education
K. K. Wagh Polytechnic
Diploma, Electronics
CDAC Mumbai
PG Diploma, VLSI
K.K.Wagh institute of Engineering Education & Research
Bachelor's degree, Electronics
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