Sai Gireeshma Jakka
DFT Design Engineer | Intel Corp
- Role
- Dft Design Enginner at Intel
- Location
- Hillsboro, OR, US
- LinkedIn followers
- 500 followers
About Sai Gireeshma Jakka
I am currently majoring Masters in Electrical and Computer engineering at Portland State University with a good knowledge in ASIC Modelling and Synthesis, Microprocessor System Design, Formal verification.A good understanding in System Verilog, C and Verilog.Operating Systems: Linux and Windows.During the 1st term of my degree my course work included designing a memory-controller capable of serving the shared last level cache of a four core 3.2 GHz processor employing a single memory channel populated by a single-ranked 8GB PC4-25600 DIMM. Undertaking this project not only improved my problem solving technique but also increased my knowledge in coding (System Verilog).Having an under-graduate degree majoring in Electrical and computer engineering and having an experience for an year in Software field made me realize my passion towards the Design field. I am delighted to be presented with the opportunity to utilize the skills gained during my studies to solve problems in the engineering world and I am eager to hear about potential career opportunities in the field of Design verification as an intern starting January 2023
Experience
Dft Design Enginner
May 2024 — Present · Hillsboro, OR, US
Education
FIITJEE
State board, Junior High/Intermediate/Middle School Education and Teaching
Portland State University
Master's degree, Electrical and Electronics Engineering
2021
Students Careers
Cbse
GITAM Deemed University
Bachelor of Technology - BTech, Electrical and Electronics Engineering
2016 — 2020
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