Ghanshyam Verma
Fpga Rtl Design Engineer @XDLINX Space Labs
Raipur, IN
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WORK HISTORY
Apr 2024 — Present
Fpga Rtl Design Engineer @XDLINX Space Labs
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Hyderabad, IN
Developing an in-house SDR Board to enhance communication between satellite and ground, simplifying data transmission and enabling seamless data exchange. Implemented cutting-edge digital communication blocks for symbol Tx chain transmission, ensuring accurate data delivery and successfully retrieving original data for processing.
EDUCATION
2021 — 2023
IIIT-Naya Raipur
Master's degree
2015 — 2019
Chhattisgarh Swami Vivekanand Technical University (CSVTU)
Bachelor of Engineering - BE
ABOUT GHANSHYAM VERMA
RTL Design Engineer | FPGA Development | DSP & Algorithm Implementation With 2+…
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