Gerald Briat

Fe Design Leader @STMicroelectronics

Grenoble, FR

EMAILS

[email protected]

MOBILE NUMBERS

+91 *********19

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WORK HISTORY

Jun 2024 — Present

Fe Design Leader @STMicroelectronics

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Grenoble, FR

SKILLS

Static Timing AnalysisJtagIntegrated Circuit DesignDftRtl CodingVerilogLogic SynthesisNcsimTiming ClosureSimulationDebuggingDigital DesignIcAtpgTestingMicroelectronicsSocLow-Power DesignTclAsicBistRtl DesignPerl

ABOUT GERALD BRIAT

Front-end design leader at STMicroelectronics

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