George Miclea

Channel Fae Manager - Southwest @AMD

Irvine, CA, US
EMAILS
g••••••••@amd.com
MOBILE NUMBERS
+19•••••••62

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WORK HISTORY

Aug 2023 — Present

Channel Fae Manager - Southwest @AMD

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EDUCATION

1998 — 2001

University of Southern California

MSEE, VLSI, Communication Systems

1992 — 1997

California State Polytechnic University-Pomona

BSEE, Electrical Engineering, Computer Engineering

SKILLS

PerlSemiconductorsSynplify ProCFirmwareDebuggingVisioSocVlsiPcieArmPublic SpeakingXilinxSystemverilogQuartusFpgaDigital Signal ProcessorsAsicApplication-Specific Integrated Circuits (Asic)Timing ClosureVhdlPcb DesignSchematic CaptureSpiAmba AhbPalladiumVerilogFpga PrototypingAlteraTeachingTclRtl CodingRtl DesignEmulationPerl ScriptField-Programmable Gate Arrays (Fpga)Uart

ABOUT GEORGE MICLEA

Innovative technical professional with over 20 years of experience in engineering design and support. Self-motivated, problem solver with a proven track record for process improvement, product development, and building solid customer relationships. Possesses excellent communication and presentation skills, works extremely well with others, and is skilled in collaborating across departments and teams in order to meet enhance camaraderie, efficiency, and ultimately meet strategic goals. Adept at delivering hardware emulation solutions to complex front-end ASIC problems, often times multi-tasking across concurrent projects. Has an ability to remain calm and focused on the tasks at hand despite obstacles and stressful situations. Engineering and technical expertise includes… Languages: Verilog, SystemVerilog, VHDL, Perl, Tcl/Tk, Python, C, Tools: Cadence UXE, Cadence SimVision, Xilinx Vivado/ISE, Xilinx SDSoC/HLS Visio, OrCAD, Allegro, Excel VBA and PivotTables

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