Gaurav Toshniwal
Digital Design Engineer at Apple
- Role
- Asic Design Engineer at Apple
- Location
- Santa Clara, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Asic Design Engineer
Sep 2022 — Present · Cupertino, CA, US
Education
SRM IST Chennai
Bachelor's degree, Electrical, Electronics and Communications Engineering
University of Southern California
Master's degree, Electrical and Electronics Engineering
Skills
- Vhdl
- Verilog
- Matlab
- C
- Modelsim
- Labview
- Cadence Virtuoso
- Lean Tools
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