Gaurava Srivastava
SoC DV is hiring DV Engineers (all levels, location Austin TX)
- Role
- Design Verification Manager at Apple
- Location
- Austin, TX, US
- LinkedIn followers
- 500 followers
About Gaurava Srivastava
Expertise in functional verification, transaction level modeling, architecture exploration, developing test bench, functional coverage, SVA and debugging. Specialties: Verilog, SystemC, C++, SystemVerilog, UVM, Ethernet, PCIe, eSPI, AMBA, cache coherency, cache controller, soc subsystems, soc fullchip
Experience
Design Verification Manager
Apr 2020 — Present · Austin, TX, US
Education
University of Allahabad
B.Tech., Electronice & Communication
2002 — 2005
Indian Institute of Technology, Delhi
Masters, VLSI Design, Tools and Technology
2006 — 2008
Stanford University Graduate School of Business
Stanford LEAD Professional Certificate. Executive Education
Skills
- Ic
- C++
- Verilog
- Hardware Architecture
- Functional Verification
- Systemc
- Debugging
- Embedded Systems
- Eda
- Microprocessors
- Uvm
- Systemverilog
- Semiconductors
- Computer Architecture
- Pcie
- Asic
- Arm
- Simulations
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