Gaurav Valecha
Manger - Embedded Engineer @Larsen & Toubro
Mumbai, MH, IN
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MOBILE NUMBERS
+91 *********19
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WORK HISTORY
Jul 2023 — Present
Manger - Embedded Engineer @Larsen & Toubro
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EDUCATION
2007 — 2010
Vivekanand Education Society's Polytechnic
DIploma in Electronics & Video Engg, Electrical, Electronics and Communications Engineering
2010 — 2013
K. J. Somaiya Institute of Technology
Bachelor of Engineering (BE), Electronics Engineering
2022 — 2025
Indian Institute of Technology, Bombay
MTech in Electrical Engineering, Integrated Circuits and Systems
1994 — 2007
Catholic education society Michael high school
SSC, English
SKILLS
ArmLtspiceArm7Pads LogicDigital Circuit DesignCOrcadSpiPower Electronics DesignTestingIgbtTina-TiPower ElectronicsDacsOpampAdcsMicrocontrollers8051 MicrocontrollerPcb DesignPads LayoutFpgaRs232I2cDigital Signal ProcessorsAnalog Circuit DesignOrcad CaptureCan BusUsbAnalogMosfetArm ArchitectureEmbedded SystemsHardware Architecture
ABOUT GAURAV VALECHA
MTech from IIT Bombay in Integrated Circuits and Systems,Majors in Analog CMOS IC design.12+ years experience in Embedded Hardware designing.
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