Gaurav Gupta
SMTS Silicon Design Engineer at AMD
- Role
- Smts Silicon Design Engineer at AMD
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Gaurav Gupta
Programming Language - System Verilog as HVL,Python, Perl and Shell (Scripting)Simulation Tools - Synopsys VCS, Cadence IUS, Synopsys DVE, Simvision, ICCR Protocols Known - Ethernet 10/100/1G and respective interfaces, AMBA AHB, APB, UART, 1588, GPIO, SPI, JTAGVerification Methodology - UVM,OVMHardware Description Language - Verilog, VHDL
Experience
Smts Silicon Design Engineer
Jul 2025 — Present · Bengaluru, IN
Education
International Institute of Information Technology Pune
M.Tech, Microelectronics and VLSI
2010 — 2012
Jaypee University of Information Technology
B.Tech, ECE
2006 — 2010
Skills
- Gate Level Simulation
- Digital Design
- Xilinx
- Systemverilog
- Vlsi
- Arm
- Vcs
- Integrated Circuit Design
- Functional Verification
- Application-Specific Integrated Circuits (Asic)
- System Verilog
- Uvm
- Modelsim
- Universal Verification Methodology (Uvm)
- Ethernet
- Verilog
- Open Verification Methodology
- Very-Large-Scale Integration (Vlsi)
- Asic
- Rtl Design
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