Gaurang Nagrecha
- Role
- Soc Design Engineering Manager - Emulation at Intel
- Location
- Sacramento, CA, US
- LinkedIn followers
- 500 followers
Experience
Soc Design Engineering Manager - Emulation
Jan 2019 — Present
Skills
- Systemverilog
- Verilog
- Debugging
- Soc
- Processors
- Rtl Design
- Fpga
- Vlsi
- Tcl
- Emulation
- Field-Programmable Gate Arrays (Fpga)
- Static Timing Analysis
- Vhdl
- Hardware Architecture
- Application-Specific Integrated Circuits (Asic)
- Hardware
- Asic
- Functional Verification
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