Garry Widley
Lead Digital Design Engineer @Purelifi Ltd
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WORK HISTORY
Lead Digital Design Engineer @Purelifi Ltd
Edinburgh, GB
EDUCATION
The University of Edinburgh
Beng, Electronics
Edinburgh Napier University
PGD, Advanced electronic systems
SKILLS
ABOUT GARRY WIDLEY
Professional, motivated and innovative FPGA VHDL and PCB Design Engineer with extensive experience. Adaptable and quick learning, with good workpackage management abilities. Equally at home with complex, multi-layer digital PCB design, or large complex multi-FPGA design. Forms good working relationships at all levels through team working, leadership and communication.Technologies used - PCI | VME | DDRII | Ethernet 1G | SMPTE292 | HD-SDI | SD-SDI | Hotlink | POS oc3/12 | Digital FIR Filters | Xilinx MGT/GTPs | ADCs | DVIPatents held : 74•••46 Filing date: Jul 30, 2003 Issue date: Aug 12, 2008 Application number: 10/524,528 Network Monitor MethodSpecialties: Programming Languages: VHDL | C | PascalFPGA Tools: HDL Turbo Writer | Mentor HDL Designer, ModelSim, Leonardo Spectrum, Precision | Synplicity Synplify | Cadence NC-SIM| Altera Quartus II and MaxPlus II | Xilinx ISE Other Technical Tools: Orcad PCB | Cadence Concept | Mentor HyperLynx | MatlabApplications: SourceSafe | Microsoft Office | Telelogic DOORS | OpenProj.
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