Garima Singh

About Garima Singh

I am a Software Quality Engineer with hands-on experience in both manual and automated testing, currently working in the semiconductor domain at KLA, Chennai. In my role, I design and validate inspection recipes for patterned wafers using advanced tools, enabling semiconductor leaders like Intel and Samsung to detect critical defects and improve manufacturing yield. My responsibilities span across recipe setup, defect analysis, test execution, and customer deliverables, ensuring high accuracy and reliability of inspection systems.On the automation side, I work with Java, Selenium, CI/CD pipelines, Git, and diagnostic tools (Cougar) to perform performance, regression, and feature testing, while managing defects efficiently through IBM RTC. This blend of domain expertise and test automation allows me to deliver quality-driven solutions that enhance system performance and customer satisfaction.Previously, I worked as a Backend Quality Analyst, where I validated data integrity and system accuracy, building a meticulous and results-driven approach to testing. With a B.Tech in Electrical, Electronics & Communication Engineering, I bring strong analytical skills, problem-solving abilities, and a detail-oriented mindset to every project.My goal is to continue growing as a software testing professional, bridging the gap between cutting-edge semiconductor technology and robust software quality engineering, while contributing to impactful, high-quality products.

Experience

1. Software Quality Engineer

   科天

   Jul 2025 — Present · Chennai, IN

   As a Software Quality Engineer in the semiconductor domain, I work on ensuring the quality and reliability of advanced inspection systems used for patterned wafer defect detection. My responsibilities include:Recipe Setup & Testing: Creating inspection recipes using the BBP tool by loading wafers from multiple clients (Intel, Samsung, etc.) into alignment optics, performing light training, and capturing wafer patch images to identify critical defects (short circuits, dust particles, contamination, etc.).Defect Analysis & Customer Deliverables: Enabling accurate defect detection by validating inspection results and providing customized recipes directly to semiconductor leaders like Intel and Samsung.Manual & Automation Testing: Executing both manual and automated test cycles covering performance, regression, and feature validation to ensure system robustness.Automation & Tools: Hands-on experience with Java, Selenium, JDK, CI/CD pipelines, Git, and Cougar (diagnostic tool) for testing automation and system verification.Bug & Test Management: Managing test artifacts and defect lifecycle using IBM RTC for effective tracking, reporting, and resolution.Through this role, I contribute to delivering high-quality, production-ready inspection solutions that enhance yield and reduce risks in semiconductor manufacturing.

Education

• MANGALMAY INSTITUTE OF ENGINEERING AND TECHNOLOGY, GREATER NOIDA

  Bachelor of Technology - BTech, Electrical, Electronics and Communications Engineering

• Masai

  Software Development Engineer In Test (SDET), Computer Software Engineering