Garima Bhatia
Senior staff Engineer at Synopsys Inc | VLSI Expert
- Role
- Senior Staff Engineer at 新思科技股份有限公司
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Garima Bhatia
Experienced Design Engineer with a demonstrated history of working in the semiconductors industry. My work here includes Block level RTL to GDSII Implementation for arm cores which involves synthesis, floor-planning, placement, CTS, power planning, routing and STA closure with experience in both Cadence and Synopsys EDA tools. Performing Physical verification checks (DRC and LVS), RC Extraction, Formal Verification (LEC), power/IR closure, physical IP and power-grid methodology tuning.Strong engineering professional with a Master of Technology (MTech) focused in VLSI from Delhi College of Engineering, awarded gold medal for securing top position.
Experience
Senior Staff Engineer
Feb 2025 — Present
Skills
- C
- Digital Circuit Design
- C++
- Analog Circuit Design
- Verilog
- Pspice
- Perl Automation
- Vhdl
- Orcad
- Linux
- Java
- Tcl
- Analog
- Static Timing Analysis
- Perl
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