Gargi D.
- Role
- Marvell Technology
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
About Gargi D.
Result-focused and motivated ASIC design engineer with extensive knowledge of ASIC design…
Experience
Present
Skills
- Logic Synthesis
- Very-Large-Scale Integration (Vlsi)
- Microcontrollers
- Cadence
- Asic
- Vlsi
- Timing Closure
- C
- Verilog
- Rtl Design
- Integrated Circuit Design
- Static Timing Analysis
- Serial Communications
- Computer Architecture
- Debugging
- Perl
- Soc
- System on a Chip (Soc)
- Firmware
- Arm
- Logic Design
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