Ganesh Chilagani
Sr Principal Design Engineer at Cadence
- Role
- Sr Principal Design Engineer at Cadence
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Ganesh Chilagani
Reset IC, Fet Driver,DC-DC converter,Li-Ion Battery Charger,SerDes High speed links,Lane PLL,Aphy,C2C Transmitter, Ucie adv Transmitter
Experience
Sr Principal Design Engineer
Aug 2025 — Present · Bengaluru, IN
Education
National Institute of Technology Warangal
MTECH, VLSI SYSTEM DESIGN
2007 — 2009
Skills
- Integrated Circuit Design
- Bandgap References
- Ldo
- Analog Circuit Design
- Power Management
- Analog
- Mixed Signal
- Cadence Virtuoso
- Cmos
- Vlsi
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