Ganesh Bhat
Analog Layout Design Engineer || TSMC 16nm || Intel 18A,7nm
- Role
- Senior Analog Layout Engineer at Quest Global
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Ganesh Bhat
Analog Layout Engineer with hands on experience in Full Custom Layout Design. I have worked on current advance technology nodes.Currently working for Phase Locked Loop ( PLL ) project in Intel 7nm and 5nm nodes.Experience:• Experience in Floor planning, Placement, Power planning, Routing, DRC, LVS, ECO implementation. • Good knowledge on layout constraints such as Matching, Shielding, WPE and Antenna effect.• Worked on HV/EHV and RV Flows.• Good understanding of Reliability issues such as EM, IR etc.• Good at problem solving and Communication skills.Technology:1. Intel 7nm ( 1276 )2. Intel 5nm ( 1278 )3. UMC 180nmTools used:1. Cadence Virtuoso XL and EXL for Layout edits2. LVG for Layout verification3. Totem for RV analysisProjects:1. Phase-Locked-Loop (PLL)- Intel 7nm and 5nm2. ALU - 180nm3. PLL - 180nm
Experience
Senior Analog Layout Engineer
Jan 2025 — Present · Bengaluru, IN
Project: IVRClient: Nvidia
Education
Poornaprajna College, Udupi - 576102
PUC, PCMS
Nitte Meenakshi Institute of Technology
Bachelor of Engineering - BE, Electrical and Electronics Engineering
Vishwadarshana Education Society
SSLC
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