Gagan Chopra

About Gagan Chopra

Staff Engineer with 14+ years of experience in SoC RTL frontend design and integration across leading semiconductor companies. I’ve led complex IP and subsystem integrations—ranging from debug, trace, and safety-critical modules to high-speed interfaces like PCIe and MIPI-CSI2 across multiple successful tape-outs.Skilled in RTL design (Verilog/VHDL), synthesis, CDC/RDC, and sign-off flows (Lint, LEC, CRR), I bring deep expertise in SoC architecture, Arteris NoC integration, and low-power design. I thrive in cross-functional environments and am passionate about driving design excellence and mentoring teams.SpecialtiesSoC integration: Integrated Various IP\'s,FLEX-CAN, ENET, PCIe, MIPICSI2, SIUL, IOMUX.etc.NOC Gneration: NIC400, NI700, NOC using brinel and Arteris ToolDesign various IP: SPI, USART (UART+ SPI), I2C, Watchdog, Sleep Counter.Bus Architectures & Protocols: Wishbone bus, I2C & Arteris- NoC.Langauges: VHDL, Verilog, SVA.Scripting: UNIX shellSynthesis: Design compiler.

Experience

1. Staff Engineer

   Arm

   Nov 2022 — Present · Bengaluru, IN

   RTL LeadMicro-ArchitectureNOC, NI700 and NIC400SMMU

Education

• Centre for Developement of Advanced Computing (CDAC) , NOIDA'2010

  PG Diploma

  2010 — 2011

• Career Institute of Technology & Management, Maharishi Dayanand University, Rohtak

  Bachelor of Engineering

  2004 — 2008

Skills

• Rtl Design
• Functional Verification
• Systemc
• Cadence Virtuoso
• Vlsi
• Semiconductors
• Low-Power Design
• Very-Large-Scale Integration (Vlsi)
• Uart
• Logic Design
• Rtl Verification
• Application-Specific Integrated Circuits (Asic)
• Verilog
• Rtl Coding
• Soc
• Vhdl
• Altera Quartus
• Unix Shell Scripting
• Static Timing Analysis
• Digital Electronics
• I2c
• Fpga
• Asic
• Ncsim
• Spi
• Tcl
• Logic Synthesis
• Fpga Prototyping
• Xilinx
• Systemverilog
• Uvm
• Usart
• Xilinx Ise
• Modelsim