Fred Bontemps

About Fred Bontemps

Self-motivated, organized and detail-oriented team player with experience in FPGA based…

Experience

1. Senior Staff Engineer

   美商高通國際股份有限公司

   Jan 2007 — Present

   FPGA Based SoC Emulation EngineerPerform full chip System-on-Chip (SoC) emulation of various subsystems of 3 server class and 3 mobile SoCs on custom FPGA-based platform.•Modified ASIC RTL when required to map to FPGA compatible functionality. oGenerated RTL to interface ASIC logic to emulation infrastructure logic, xdc/sdc constraints for emulation specific RTL, used Synplify and Xilinx Vivado. oASIC interfaces emulated I2C, SPI, UART, JTAG, SPMI.•Partitioned ASIC RTL into available FPGA resources, including LUTs, FPGA interconnect and IO, using Certify.•Participated in, and led, multiple bring-up and debug efforts of emulation builds.•Analyzed early documentation and RTL to drive design of emulation boards.•Debugged emulation platform hardware and FPGA build issues.•Wrote Perl and shell scripts, supporting automation of Certify and FPGA build flows and checking results.Software Development Platform Design EngineerCreated platforms and boards to support internal and external customer’s software, verification, and product teams.•Designed software development platforms that included all major subsystems and interfaces that were anticipated to be included in future smartphone and netbook platforms. oGenerated requirements, schematic, layout guidelines/support, and coordinated with mechanical, purchasing, manufacturing, software and test teams.•Developed and implemented hardware for embedded power monitoring system, analyzed power grids, selected current sense amplifiers and resistors, captured schematics, provided routing guidelines and verified functionality.•Developed cards to support proprietary power measurement HW between main verification platform and PMIC daughter card.•Supported design activities at external customers/ODMs via schematic and layout reviews, resolution of technical and BOM issues, and bring-up test execution.•Performed quick spin of processor and memory card pair to address SI issues. oSimulated DDR routing in Hyperlynx.

Education

• Mississippi State University

  B.S.

Skills

• Debugging
• C
• Pcb Design
• Soc
• Systems Engineering
• Arm
• Testing
• Perl
• Embedded Systems
• Firmware
• Microprocessors
• Verilog
• Fpga
• Embedded Software
• Asic
• Wireless