Francisco Alderete
Pre-Silicon Design Verification Engineer
- Role
- Hardware Design Verification Engineer at Intel
- Location
- Dallas, TX, US
- LinkedIn followers
- 500 followers
About Francisco Alderete
https://francisco-alderete.us/
Experience
Hardware Design Verification Engineer
Jul 2022 — Present · Dallas, TX, US
RTL verification (simulation)Interrupt verificationError injection verification (MAC/PCS)Clock AssertionsUNIX work environmentDatarate bringup in ethernetIP verificationAI use to accelerate testbench generation and test corner casesPre Silicon verificationEthernet Sub System VerificationFirmware generationUVM testbenchingOVM testbenching
Education
The University of Texas at Dallas
Bachelor’s Degree, Electrical and Electronics Engineering
2014 — 2017
Skills
- Eagle Pcb
- Signal Processing
- Labview
- Msp430
- Management
- Leadership
- Project Management
- Teamwork
- Energia
- Pspice
- Xilinx Ise
- Assembly Language
- Java
- Arduino
- Electric Network Analysis
- C
- C++
- Electronic Circuit Design
- Matlab
- Creo Parametric
- Digital Circuit Design
- Analog Circuits
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