Fei
Senior Compiler Engineer at NVIDIA
- Role
- Senior Compiler Engineer at NVIDIA
- Location
- Seattle, WA, US
- LinkedIn followers
- 500 followers
About Fei
With over 9 years of combined professional and academic experience in compiler optimization, programming language design, program performance analysis/tuning with CPU/GPU architecture, and high-performance heterogeneous computing.
Experience
Senior Compiler Engineer
Jan 2019 — Present · Seattle, WA, US
Developing and maintaining CUDA compiler’s mid-end optimizer (NVVM), which improves CUDA compiler optimizations (e.g, loop optimizations, memory coalescing optimizations, instruction scheduling, etc.) for key AI/HPC scenarios (e.g, cuBlas, cuSparse, CUTLASS, etc.) and new NVIDIA GPU architectures including Volta, Ampere, and Hopper- Engaged in the HW-SW codesign process that bridges HW ISA design with high-level applications through language design and code optimizations. Conducted training sessions to educate application developers on writing efficient CUDA code to maximize hardware performance.
Education
University of Wisconsin-Milwaukee
Master of Science (MS), Computer Science, 3.52
2014 — 2016
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