Farman Ullah

Analog Ic Design Engineer @Neuranics

Glasgow, GB
MOBILE NUMBERS
+91 *********19

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WORK HISTORY

Jun 2024 — Present

Analog Ic Design Engineer @Neuranics

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Designed core circuit blocks at the transistor level using 65nm CMOS technology, including Bandgap Reference, Beta Multiplier, Instrumentation Amplifier, Low Dropout Voltage Regulator (LDO), On-chip Clock Generation Circuits (Maneatis delay cell based RVCO and LC-Tank based VCO) and IO Pad-frame design.> Engaged in layout design and review, collaborating closely with the layout engineer to ensure design integrity and performance.> Lab setup for chip testing, identifying and procuring essential instruments.> Conducted chip testing and characterisation, analysing measurement results to drive improvements for the next-generation design.

EDUCATION

2009 — 2010

University of Surrey

MSc, Wireless Communication

N/A

University of Glasgow

Postdoctoral, Microelectronics

N/A

University of Chinese Academy of Sciences

Doctor of Philosophy - PhD, Microelectronics & Solid-State

2005 — 2008

University of Hull

BSc, Mobile Communication

ABOUT FARMAN ULLAH

Analog IC design engineer:>Several tapeouts experience in GF22nm, GF130nm…

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