Farman Ullah
Analog Ic Design Engineer @Neuranics
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WORK HISTORY
Analog Ic Design Engineer @Neuranics
Designed core circuit blocks at the transistor level using 65nm CMOS technology, including Bandgap Reference, Beta Multiplier, Instrumentation Amplifier, Low Dropout Voltage Regulator (LDO), On-chip Clock Generation Circuits (Maneatis delay cell based RVCO and LC-Tank based VCO) and IO Pad-frame design.> Engaged in layout design and review, collaborating closely with the layout engineer to ensure design integrity and performance.> Lab setup for chip testing, identifying and procuring essential instruments.> Conducted chip testing and characterisation, analysing measurement results to drive improvements for the next-generation design.
EDUCATION
University of Surrey
MSc, Wireless Communication
University of Glasgow
Postdoctoral, Microelectronics
University of Chinese Academy of Sciences
Doctor of Philosophy - PhD, Microelectronics & Solid-State
University of Hull
BSc, Mobile Communication
ABOUT FARMAN ULLAH
Analog IC design engineer:>Several tapeouts experience in GF22nm, GF130nm…
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