Fabian Giroud
Senior Mask Designer / Entrepreneur / Angel Investment
- Role
- Senior Mask Design Engineer at NVIDIA
- Location
- San Francisco, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Fabian Giroud
Current- Since 2010, I proposed my expertises in the domain of design, layout and…
Experience
Senior Mask Design Engineer
Jan 2021 — Present · San Francisco, CA, US
Working closely with circuit and optical designers, toplevel planning- Using EMIR Totem and Voltus to verify the layout- Using EMX solver to implement passive elements- Working with TSMC5, TSMC3, GF45-optical, GF22
Skills
- Dfm
- Cmos
- Application-Specific Integrated Circuits (Asic)
- Physical Verification
- Baseband
- Analog Circuit Design
- Lvs
- Integrated Circuit Design
- Ic
- Verilog
- Eda
- Analog
- Silicon
- Cadence Virtuoso
- Usb
- Soc
- Asic
- Semiconductors
- Ic Layout
- Simulations
- Physical Design
- Drc
- I2c
- Spectre
- Rf
- Electronics
- Mixed Signal
- Circuit Design
- Analog Design
- Simulation
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