Eric Deal
- Role
- Principle Digital Design Engineer at Silicon Labs
- Location
- Austin, TX, US
- LinkedIn followers
- 500 followers
About Eric Deal
SOC digital design and architecture experience with on-chip and off-chip busses…
Experience
Principle Digital Design Engineer
Jan 2020 — Present
Education
Texas A&M University
BSEE, Electrical Engineering
Skills
- Asic
- Rtl Coding
- Altera
- Fpga
- Hardware Architecture
- Verilog
- Axi
- Digital Design
- Embedded Systems
- Arm
- Application-Specific Integrated Circuits (Asic)
- Rtl Design
- Bch
- Debugging
- Hardware Design
- Hardware
- Field-Programmable Gate Arrays (Fpga)
- Soc
- Xilinx
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