Eric Zheng

Ml Shader Compiler Optimization Intern @AMD

Toronto, ON, CA
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WORK HISTORY

May 2025 — Present

Ml Shader Compiler Optimization Intern @AMD

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Markham, ON, CA

Developed ML-based acceleration with PyTorch for shader compiler optimizations on AMD Radeon GPU kernels within the LLVM framework.• Designed and implemented a Mixed-Integer Linear Programming (MILP) instruction scheduler with Python and C++, improving schedulingperformance by 20–30% over the traditional list scheduler.• Designing an ML model in PyTorch to accelerate the MILP scheduler solving speed for practical deployment in GPU kernel compilation pipelines.• Planning to apply a Graph Convolutional Network (GCN) in PyTorch with imitation learning to mo

EDUCATION

N/A

University of Toronto Engineering

Bachelor of Applied Science - B.A.Sc, Electrical and Computer Engineering

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University of Toronto

Master of Science in Applied Computing, AI Concentration, Artificial Intelligence

N/A

Peking University

Exchange Student, Business, Management, Marketing, and Related Support Services

ABOUT ERIC ZHENG

In a world driven by the rapid development of artificial intelligence, I am excited about…

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Eric Zheng — Ml Shader Compiler Optimization Intern at AMD in Toronto, ON, CA | Unifers