Eric Gu
- Role
- Hardware Engineer at Palo Alto Networks
- Location
- Santa Clara, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Eric Gu
Over 15 years of experience in design verification. Extensive hands-on experience in…
Experience
Hardware Engineer
Dec 2013 — Present
ASIC Verification
Skills
- Rtl Design
- Perl
- Arm
- C++
- Systemverilog
- C
- Asic
- Usb
- Pcie
- Verilog
- Soc
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