Bengt-Erik Embretsén

About Bengt-Erik Embretsén

Electronic Design Automation and IT Infrastructure Professional with extensive experience in implementing design environments to increase efficiency and decrease expenses. Widely acknowledged as an industry expert in General EDA and Infrastructure. A flexible decision-maker with excellent analytical, negotiating and communications skills. Leverage organization, planning, leading, analysis, and communication skills to solve technical problems in high paced and rapid evolving R&D environments. Expert in generating solutions and suggestions to solve problems hindering projects to meet their Time-to-market goals without compromising quality. From design specification, design, implementation to test, in-depth user knowledge of entire design flows. Directed and developed CAD and R&D teams into using time efficient design flows and workstation setup to enable efficient designs. Enabled efficient decision-making and cost savings in expensive design environments- General EDA - Problem solving - Contract negotiations of tool vendor licenses, IP and hardware - Project Management and Team lead, internal and external customers - RTL2GDS Implementation & Verification environments and methods - PDK and Design libraries development - Ultra Low Power techniques - Infrastructure for local and global design environments - Distributed compute processing, private cloud, local and multi-site - Unix/Linux/Windows systems and administration - Tcl/Tk, Perl, Csh, Sh, Bash, Tcsh, Ksh scripting - MS Office, Visio, MS Project, Framemaker and other - 24+ years experience

Experience

1. Sr Principal Application Engineer

   Cadence

   Feb 2019 — Present · San Diego, CA, US

   Synthesis, STA and DFT. 2nm techniques, advanced techniques for synthesizing

Education

• University of Phoenix

  Master, Business Administration, Global Management

  2010 — 2012

• Rodenskolan

  NT, NT

  1983 — 1986

• Luleå University of Technology

  Masters, Industrial Electronics

  1989 — 1995

• Luleå University of Technology

  Master, Computer Science

  1989 — 1995

Skills

• Analog Circuit Design
• Dft
• Simulations
• Cadence
• Infrastructure
• Semiconductors
• Functional Verification
• Verilog
• Jtag
• Schematic Capture
• Microelectronics
• Analog Design
• Communication
• Solaris
• Cadence Virtuoso
• Debugging
• Spice
• Low-Power Design
• Static Timing Analysis
• Ncsim
• Management
• Logic Synthesis
• Semiconductor Industry
• Ic
• Drc
• Physical Verification
• Timing Closure
• Support
• Parasitic Extraction
• Mixed Signal
• Integrated Circuit Design
• Tcl-Tk
• Asic
• Verilog-a
• Perl
• Spectre
• Csh
• Soc
• Eda
• Linux Server Administration