Dvisha Kishore Bakarania
Physical Design and Timing Engineer @NVIDIA
Santa Clara, CA, US
EMAILS
d••••••••@nvidia.com
MOBILE NUMBERS
+91 *********19
Signup · Get unlimited contacts
WORK HISTORY
Jun 2024 — Present
Physical Design and Timing Engineer @NVIDIA
View department →
Santa Clara, CA, US
EDUCATION
2022 — 2024
University of Pennsylvania
Master of Science - MS, Electrical Engineering
2015 — 2019
Nirma University, Ahmedabad, Gujarat, India
Bachelor of Technology - BTech
ABOUT DVISHA KISHORE BAKARANIA
I am currently pursuing a Masters in Electrical Engineering at the University of…
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.