Drishyada M S

About Drishyada M S

RF hardware engineer with strong background in RF design validation, debugging, and performance optimization across 5G, LTE, 3G, and 2G platforms. Experienced in end-to-end evaluation of RF front-end systems, including PA, LNA, duplexers, and matching networks, ensuring optimal linearity, efficiency, and sensitivity. Demonstrates deep understanding of gain states, mode transitions, bias tuning, and their impact on ACLR, EVM, and noise figure under varying power and band conditions.Proven expertise in resolving complex TX issues such as spur emissions and ACLR degradation through coupling analysis and network optimization, while enhancing RX performance through jammer tolerance validation, desense mitigation, and layout-level isolation improvements. Skilled in using RF lab equipment including spectrum analyzers, VNAs, call boxes, and signal generators for detailed validation and root-cause analysis. Collaborates closely with system, design, and layout teams to correlate lab results with simulations, driving robust and compliant RF front-end designs.

Experience

1. Senior Engineer

   高通

   Dec 2023 — Present · Hyderabad, IN

Education

• Sree Vidyanikethan Engineering College

  Bachelor of Technology - BTech, Electronics and Communication Engineering

  2015 — 2019

• National Institute of Technology Rourkela

  Master of Technology - MTech, Microwave/RF and Radar Engineering

  2019 — 2021