Vinay Sharma
Post-Silicon(Mixed-Signal) Validation Engineer| Analog IP Validation and Debug |Bench Validation
- Role
- Mixed Signal Validation Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Vinay Sharma
Post-silicon validation engineer working on bench validation and debug of analog and mixed-signal IPs such as ADCs (Sigma-Delta, SAR), GPIOs, analog drivers, and digital drivers on test chips. Overseeing the complete bench validation lifecycle from planning to closure. Adept at Python-based automation for controlling lab instruments and streamlining data collection. Skilled in debugging complex IP-level issues and correlating silicon behavior with design expectations to ensure functional and performance compliance across PVT corners. Hands-on with lab equipment including digital oscilloscopes, signal generators, arbitrary waveform generators (AWGs), BERTs, logic analyzers, RF switches, and digital multimeters. Authored and published comprehensive validation reports summarizing test results and key findings, regularly interfacing with design and customer engineering teams to provide technical insights and drive issue resolution. My academic background includes a Ph.D. in Antenna Design for MIMO Applications from Shiv Nadar University. During this period, I fabricated over 100 planar circuits, including antennas, phase dividers, power dividers, directional couplers, and filters
Experience
Mixed Signal Validation Engineer
Feb 2024 — Present · Bengaluru, IN
Education
Surendra Public School - Nalagarh, Himachal Pradesh, India
SSC
1995 — 2006
Rayat Polytechnic
Diploma
2006 — 2009
Shiv Nadar University
Doctor of Philosophy (Ph.D.)
2016 — 2021
Rayat Institute of engg. & Information Technology, Railmajra
Bachelor of Technology (B.Tech.)
2009 — 2012
Thapar University
Master of Technology (MTech)
2013 — 2015
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