Tumesh Kumar Sahu

About Tumesh Kumar Sahu

Ph.D. in Physics (Graphene & GaN, 2D Materials and CNT), IIT Patna, with strong focus on semiconductor devices, sensors, and advanced material systems.• 8+ years of experience in 2D material synthesis, thin-film engineering, Polymer Nanocomposite, nanomaterial integration, and functional device development.• Expertise in quantum and semiconductor device fabrication, including graphene-based quantum structures, heterostructures, and nanoscale transport devices.• Strong background in device physics, nano/micro-fabrication, lithography, etching, coating, plasma processing, and full cleanroom-compatible fabrication workflows.• Extensive experience in hydrogen & gas sensors (ionic-membrane, metal-oxide, and 2D material–based platforms) with deep understanding of interface chemistry and transduction mechanisms.• Proven development of FETs, photodiodes, TMR devices, AFM cantilevers/tips, graphene-GaN hybrid structures, and intelligent reflecting surfaces.• Skilled in defect characterization (Raman mapping, PL, AFM, TEM, XPS, electrical signatures) and semiconductor device failure analysis, including leakage, breakdown, contact resistance, drift/noise, and reliability testing.• Strong capability in material and structural characterization: XRD, AFM, SEM, TEM, UV-Vis, XPS, Raman spectroscopy.• Proficient in electrical characterization: I-V, C-V, impedance spectroscopy, transient response, and cryogenic probe-station measurements for low-noise device evaluation

Experience

1. Lead Scientist

   9n Technologies

   Apr 2025 — Present · London, GB

   CMOS-Compatible Graphene-Based Logic Device Fabrication and Characterization1. Device Conceptualization and Design: Conceptualized and designed a graphene-based logic device compatible with complementary metal-oxide-semiconductor (CMOS) technology, leveraging graphene\'s exceptional electrical and thermal properties.2. Material Selection and Optimization: Selected and optimized graphene and other materials for device fabrication, considering factors such as carrier mobility, contact resistance, and thermal stability.3. Device Fabrication and Testing: Fabricated the graphene-based logic device using state-of-the-art nanofabrication techniques, including photolithography, electron beam lithography, and plasma etching. Conducted thorough electrical characterization of the device, including DC and AC measurements.4. Collaboration and Compatibility Study: Collaborated with cross-functional team members to investigate device compatibility and feasibility, ensuring seamless integration with existing CMOS technology.5. Data Analysis and Interpretation: Analyzed and interpreted device performance data, identifying key trends, challenges,and opportunities for further optimization.

Education

• Indian Institute of Technology, Madras

  Master of Technology, Physics

  2012 — 2014

• Pt. Ravishankar Shukla University, Raipur

  Master of Social Science, Physics

• Indian Institute of Technology, Madras

  Master of Technology (M.Tech.), Solid State Technology

  2012 — 2014

• Indian Institute of Technology, Patna

  Doctor of Philosophy - PhD, Physics