Dnyaneshwar Patil

SOC Design verification Engineer | Bvmites

Role: Design Verification Engineer at ASICraft Technologies LLP
Location: Surat, GJ, IN
LinkedIn followers: 500 followers

About Dnyaneshwar Patil

Electronics Engineer with keen interest in the field of electronics and coding as well as Organisational Management, seeking to learn and grow as a professional, thereby directing my future endeavours as an asset to the organisation.

Experience

Design Verification Engineer
ASICraft Technologies LLP
Mar 2024 — Present · Ahmedabad, IN

Education

Birla Vishvakarma Mahavidyalaya
Bachelor of Technology - BTech
Dr.S and S.S. Gandhy College
Diploma of Education
2017 — 2020

Contact information

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Work email
•••••@asicraft-tech.com
Personal email
•••••@•••••.com
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Current company

ASICraft Technologies LLP

Semiconductor Manufacturing · 22 employees · Founded 2023 · Ahmedabad, Gujarat, India

Verification-First Semiconductor Consultancy · ASIC · FPGA · AMS · Global Delivery. At ASICraft Technologies, we don't just consult — we craft. We are a semiconductor engineering firm built on a singular edge: uncommon depth in design verification, delivered with the efficiency that complex silicon programs demand. Verification is where projects succeed or fail — and it's where we thrive. From IP-level assertions to full SoC regression closure, from UVM environments to mixed-signal corner coverage, ASICraft brings battle-tested verification expertise that most consultancies simply can't match. We have partnered with semiconductor companies across North America, Europe, and Asia-Pacific, giving our engineers real-world exposure to the most demanding design programs globally. Whether you need to scale a verification team overnight, close a critical tape-out milestone, or build a complete DV methodology from the ground up — ASICraft plugs in fast, aligns with your flow, and delivers. What we do: ASIC Design & Verification — IP, Subsystem & SoC · Full-cycle DV, UVM, formal verification, emulation-ready flows FPGA Design & Validation · RTL design, prototyping, and hardware validation across major FPGA families Analog Mixed-Signal (AMS) Design & Verification · Real-number modelling, mixed-signal co-verification, PVT & corner coverage Turnkey Projects · End-to-end ownership from specification to tape-out Why ASICraft: Verification-first culture — DV is our core, not a support function Cross-domain expertise spanning digital, AMS, and FPGA Active project experience with clients across US, Europe, and Asia-Pacific Lean, high-efficiency delivery — on time, within budget!

asicraft-tech.com

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About Dnyaneshwar Patil

Experience

Design Verification Engineer

Education

Birla Vishvakarma Mahavidyalaya

Dr.S and S.S. Gandhy College

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