Divynish Sharma

Design verification engineer || Thapar institute of engineering and technology

Role
Design Verification Engineer at Ciena
Location
Hamirpur, HP, IN
LinkedIn followers
500 followers

About Divynish Sharma

With a solid foundation from my Master\'s in VLSI design from Thapar Institute of Engineering & Technology. Following a successful internship at STMicroelectronics as a verification intern and one year as full time employee at Tessolve semiconductor.Skilled in Verilog, System verilog and UVM.

Experience

  1. Design Verification Engineer

    Ciena

    Sep 2024 — Present

Education

  • Thapar Institute of Engineering & Technology

    Masters in VLSI design

    2021 — 2023

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Divynish Sharma — Design Verification Engineer at Ciena in Hamirpur, HP, IN | Unifers