Divya Reddy
ASIC Design Engr. @ Synopsys.Inc | MS in Computer Engineering at USC
- Role
- Asic Design Engineer at Synopsys Inc
- Location
- Williston, VT, US
- LinkedIn followers
- 500 followers
About Divya Reddy
I am a Master of Science student in Computer Engineering at the University of Southern…
Experience
Asic Design Engineer
May 2024 — Present · Williston, VT, US
Implemented, Integrated and Verified ECC for NVMe One-Time-Programmable Memory Controller using System Verilog.• Developed test patterns to verify OTP Memory Controller functionality across access modes, configurations, and nodes to meet coverage goals.• Perform RTL quality checks including Lint, CDC, RDC to make sure design is synthesis friendly.• Built scripts and regression-tests to automate and accelerate verification, reducing debug turnaround
Education
Parivarthan Gurukul
High School
KLE Technological University - Hubballi (India)
B.Tech, Electronics and Communications Engineering
2018 — 2022
University of Southern California
Master of Science - MS, Computer Engineering
Chetan PU Science College , Hubli
PUC
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