Divya Naidu
DV intern at Apple | MSEE at University of Washington | ASIC Design | VLSI | Hardware Design
- Role
- Design Verification Engineer at Apple
- Location
- Seattle, WA, US
- LinkedIn followers
- 500 followers
About Divya Naidu
Hello! I am Divya, currently pursuing my Master’s in Electrical Engineering with a focus on VLSI at the University of Washington. My academic path includes advanced courses like VLSI II and a VLSI capstone, where I have gained substantial knowledge and practical experience. I have worked on significant projects, such as developing a scripted flow in Python that automates the conversion from RTL to GDSII, streamlining the design verification process. My passion lies in the intersection of ASIC design, machine learning, and computer architecture. I am particularly interested in leveraging AI to automate and optimize RTL and ASIC design processes. I am eager to apply my skills in innovative environments that challenge the conventional boundaries of technology.
Experience
Design Verification Engineer
Jan 2025 — Present · Beaverton, OR, US
Education
Dwarkadas J. Sanghvi College of Engineering
Bachelor of Technology - BTech, Electrical, Electronics and Communications Engineering
2019 — 2023
University of Washington College of Engineering
Master's degree
Shri TP bhatia
Hsc
2019
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