Divine A. Mathew
Design Engineer - RTL FPGA Design & Verification Engineer | Dell Technologies | IIT Jodhpur
- Role
- Electrical Engineer Grade 2 - Fpga Design & Verification Engineer at Dell Technologies
- Location
- Alappuzha, KL, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Divine A. Mathew
FPGA Design Engineer with a bachelor\'s degree in Electrical and Electronics Engineering…
Experience
Electrical Engineer Grade 2 - Fpga Design & Verification Engineer
Jul 2025 — Present · Bengaluru, IN
Education
National Institute of Information Technology
Certification
2014 — 2015
DBHSS Thakazhy
SSLC
2013 — 2014
DBHSS Thakazhy
Higher Secondary Schooling
2014 — 2016
Saintgits College of Engineering, Kottukulam Hills, Pathamuttam P.O., Kottayam 686532
Bachelor of Technology - BTech
2016 — 2020
Indian Institute of Technology Jodhpur
Master of Technology - MTech
2025 — 2027
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