Dipali Dash

About Dipali Dash

A Senior SoC Design Engineer with 10+ years of expertise and experience in SoC/IP design, integration, RTL Design and Verification/Validation, Debugging, RTL Lint/CDC/RDC, Synthesis/Timing/STA, ECO Implementation and LEC. Expertise and experience in:ASIC/FPGA Flow for Design, FPGA prototype, Verification, Validation, Synthesis/Timing. Power analysis/checks on SoC as well as specific part of various blocks.Writing/reviewing IP blocks / SoC specification documents as well as going through design reviews.ARM SoC architecture as well as Protocol exposure to AMBA bus (AHB, APB, AXI etc), USB, Ethernet, PCIe and DDR3.Keen knowledge of Verification/Validation Methodologies, DFT design, ATPG, MBIST/JTAG insertion, STA and extensive expertise and experience in timing constraints and timing take down process.Good knowledge of CPU, GPU, high speed, and peripheral Blocks architecture within SoC.Highly motivated, Team oriented, Interpersonal/Analytical skills, Able to perform independently/efficiently. Proven ability to work with people of diversified backgrounds and deliver results, Optimization of systems and test engineering. Intrigues by complex engineering problems and different approaches to it with concise decision making. TECHNICAL SKILLS Language: Verilog, System Verilog and VHDLScripting Language: Shell, TCL and basic knowledge in Perl and Python EDA Tools: Magillem, IPxact, Spyglass, Simbuild, VCS, Modelsim, NCSim, Xilinx ISE/EDK, JTAG debugger, Altera Quartus, Conformal, Power artist. Technology: Xilinx (Virtex, Spartan), Altera(cyclone), TSMC 14nm, 10nm, 7nm,5nm Processor: ARMProtocols: Ethernet, PCIe/UCIE, DDR3, AMBA (AHB, APB, AXI), USI, I2C, SPI, I2C/I3C, UFS/MMC, BT/DBG UART and PWM.Version Control System: Perforce, Clear case, Design Sink, Git.

Experience

1. Technical Lead

   HCLTech

   Jul 2024 — Present · Dallas, TX, US

Education

• SRM IST Chennai

  Master's degree, VLSI Design

  2011 — 2013

• Biju patnaik university of technology,Orissa

  Bachelor of Technology (BTech), E&TC

  2007 — 2010

Skills

• Ip Integration
• Semiconductors
• Field-Programmable Gate Arrays (Fpga)
• Vhdl
• System Verilog
• Rtl Design
• Vlsi
• Fpga
• Asic
• Xilinx
• Spyglass Lint & Cdc
• Soc Integration