Dinesh Shaukari
Senior Physical Design Engineer at Intel Corporation
- Role
- System-on-chip Design Engineer at Intel
- Location
- Austin, TX, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Dinesh Shaukari
VLSI Back-End Design Engineer working on RTL to GDS flow with deep submicron tape-out experience.Passionate about solving problems through automation and methodology development.
Experience
System-on-chip Design Engineer
Feb 2017 — Present · Hillsboro, OR, US
Education
Birla Institute of Technology and Science, Pilani
Bachelor’s Degree, Electrical and Electronics Engineering
2009 — 2013
Oregon State University
Master of Science - MS, Computer Engineering
2015 — 2016
Skills
- Vlsi
- C
- Microsoft Excel
- Verilog
- Pspice
- Cadence Virtuoso
- Matlab
- Labview
- Very-Large-Scale Integration (Vlsi)
- Algorithms
- Vhdl
- C++
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