Dilsuk Kumar Muppasani
Formal verification || AMD Pvt ltd || IIITian || RTL Design and Verification Engineer Trainee at Maven Silicon
- Role
- Formal Verification -silicon Design Engineer 2 at AMD
- Location
- Kurnool, AP, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Dilsuk Kumar Muppasani
I am a kind of person who strongly believes that working in a group makes you gain…
Experience
Formal Verification -silicon Design Engineer 2
May 2025 — Present · Bengaluru, IN
Education
Narayana junior college
12th
2015 — 2017
Bhashyam Public School
10th
Indian Institute of Information Technology Design & Manufacturing Kancheepuram
Dual degree
2017 — 2022
Indian Institute of Information Technology Design & Manufacturing Kancheepuram
Master of Technology - MTech
2023 — 2025
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