Dilshad Hossain
- Role
- Senior Package Engineer at Astera Labs
- Location
- Santa Clara, CA, US
- LinkedIn followers
- 500 followers
About Dilshad Hossain
IC packaging engineer - Have Canadian citizenship- Have TN visa -Good at…
Experience
Senior Package Engineer
Jan 2025 — Present
Product layout design for PCIe 6.x using APD from concept to execution till HVM-Path finding for future products-Knowledge of IC package design requirements for high speed interfaces and achieve Gen5/6 speed-Experience working with multiple substrate suppliers, OSATs and Silicon Fab vendors-Experience in different type of Pkg( FCCSP, FCBGA, MCM)- Collaboration with chip designer to optimize pin map and die size and PCB layout team to optimize ball map-Understanding and interpreting electrical simulation results ( Xtalk, Insertion loss, Return loss, TDR, IR drop)- Develop package models/ test structures for measurement correlation-BGA footprint creation -Using ANSYS to simulate DC IR drop analysis - Work and manage 2+ projects simultaneously-Mentoring junior engineers.
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