Dilip Reddy Challa
Senior Staff Electrical Engineer at Renesas Electronics
- Role
- Senior Staff Electrical Engineer,design Verification at Renesas Electronics
- Location
- Austin, TX, US
- LinkedIn followers
- 500 followers
About Dilip Reddy Challa
Hands-on experience :• building Mixed Signal Verification environment and performing functional verification using System Verilog & UVM.• working on multi phase buck controller Voltage Regulators.• with power management protocols including PMBUS,AVSBUS,SVID(Intel),SVI3(compatible with AMD platforms), PWM-VID interface (compatible with NVIDIA\'s open VReg Spec)
Experience
Senior Staff Electrical Engineer,design Verification
Nov 2024 — Present · Austin, TX, US
Lead Verification for Client Core Low Power Products including Digital Controller and Power Stage.
Education
SR University
Bachelor of Technology - BTech, Electrical, Electronics and Communications Engineering
University of North Texas
Master’s Degree, Electrical, Electronics and Communications Engineering
2015 — 2017
Skills
- Xilinx Ise
- Linux
- Systemverilog
- Universal Verification Methodology (Uvm)
- Perl
- Shell Scripting
- Python
- Vhdl
- Cadence Virtuoso
- Microsoft Word
- Debugging
- Keil
- Electric
- Verilog
- Hyperlynx
- Microsoft Excel
- Powerpoint
- Ovm
- C++
- Matlab
- Proteus
- Integrated Circuit Design
- C
- Programming
- Cadence
- Microsoft Office
- System on a Chip (Soc)
- Mixed Signal
- Spice
- Embedded C
- Functional Verification
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