Dibyaranjan Sathua
ASIC Engineer, EDA Infrastructure at Meta | Design Automation Engineer | Python & .NET Developer | CAD & Semiconductor Workflow Expert
- Role
- Asic Engineer, Eda Infrastructure at Meta
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Dibyaranjan Sathua
Experienced EDA engineer with a strong background in both frontend and backend CAD flows, tool development, and automation across the SoC design cycle. Proven ability to bridge the gap between hardware design and software by developing scalable tools and flows that improve productivity, consistency, and quality.Frontend CAD Flows: • Developed a power methodology to generate UPF and supply schematics from a high-level Power Intent model. • Built a DSL-driven RTL generation flow to streamline design bring-up and enforce consistency.Backend CAD Flows: • Implemented layout migration automation using SKILL. • Built checkers to validate consistency across GDS, LEF, and LIB formats using Python and Crossfire. • Managed DRC/LVS submission to third-party vendors and project sync across global sites.Infrastructure Development: • Developed backend tools using Django and Django REST Framework. • Created and deployed a real-time dashboard for PDK collateral validation. • Hands-on experience with MySQL and PostgreSQL databases.Analog Layout Expertise: • Deep understanding of layout flows and Virtuoso Layout XL. • Layout experience in TSMC 7nm technology for blocks like PLLs, Amplifiers, Comparators, and LDOs. • Proficient in SKILL for developing graphical PCells and custom GUI-based productivity tools. • Familiar with Calibre SVRF for layout rule writing and net extraction.
Experience
Asic Engineer, Eda Infrastructure
Jan 2026 — Present · Bengaluru, IN
Education
Silicon Institute of Technology
Bachelor of Technology (B.Tech.), Electronics and Telecommunication
2009 — 2013
Silicon Institute of Technology, Bhubaneswar
Bachelor of Technology (B.Tech.), Electronics and Communications Engineering
2009 — 2013
Skills
- Very-Large-Scale Integration (Vlsi)
- Analog Circuit Design
- Debugging
- Floorplanning
- Cadence Virtuoso Xl
- Regular Expressions
- Cadence Skill
- C++
- Shell Scripting
- Sed
- Pll
- Cadence Icfb
- Linux
- Powerpoint
- Electronics
- Cmos
- Semiconductors
- Matlab
- Lvs
- Cadence
- Awk
- Drc
- C
- Programming
- Mixed Signal
- Perl
- Eda
- Microsoft Office
- Vlsi
- Python
- Cadence Virtuoso
- Html
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