Dhruv K.
Physical Design STA Engineer at Annapurna labs, Amazon | Ex- Graphics Hardware Engineer at Intel corporation | Umass Amherst | ex PD engineer Einfochips
- Role
- Physical Design Sta Engineer (Ml Accelerator) at Annapurna Labs
- Location
- Austin, TX, US
- LinkedIn followers
- 500 followers
About Dhruv K.
Owning physical design timing for AWS Trainium/Inferencia MLA chips Full chip sta,…
Experience
Physical Design Sta Engineer (Ml Accelerator)
Sep 2023 — Present · Austin, TX, US
Education
Chandubhai S. Patel Institute of Technology
Bachelor of Technology (B.Tech.) , Electronics and Communication Engineering
2013 — 2017
Charusat
Bachelor of Technology - BTech, Electronics and Communications Engineering
2013 — 2017
University of Massachusetts Amherst
Master of Science - MS, Electrical and Computer Engineering
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