Dhaval Patel
Associate Director at Samsung R&D Institute India | GPU DV
- Role
- Associate Director at Samsung Semiconductor
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Dhaval Patel
Hardware Description Language: Verilog HDL- High level Verification Language: System Verilog- Hardware Architectures: AXI, APB, AHB,Basics of Nvme,GPU- Methodology known: UVM, Basics of VMM- Scripting Languages: Perl Scripting, Shell Scripting- EDA Tools: QuestaSim, VCS, ISE (Xilinx), Cadence simvision- Programming Languages: C, C++- Operating Systems: Linux, Windows- Experience in Constrained Random Verification and writing the assertions- Experience in running regression and coverage reports- Experience in working with bug tracking tools JIRA, documentation tool confluence- Knowledge of SVN, Perforce repository- Experience in working with design sync repository.
Experience
Associate Director
Mar 2025 — Present · Bengaluru, IN
Education
KALOL INSTITUTE OF TECH. & RESEARCH CENTER ,KALOL 026
Engineer’s Degree, Bachelor of engineering in Electronics and Communications
2007 — 2011
Manikrupa High School, Chandkheda, Ahmedabad
High School, 12th Science
2006 — 2007
Manikrupa High School, Chandkheda, Ahmedabad
High School, 10th
2004 — 2005
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