Dhaval Panchal
Design Verification Engineer @ Arm
- Role
- Design Verification Engineer at Arm
- Location
- San Diego, CA, US
- LinkedIn followers
- 500 followers
About Dhaval Panchal
Passionate ASIC Verification Engineer with 13+ years of experience in developing and executing comprehensive verification strategies for cutting-edge semiconductor designs. Adept at using advanced verification methodologies, including UVM, System Verilog, to ensure high-quality, reliable ASIC products. Core Competencies:Verification Methodologies: Expertise in UVM and System Verilog.Testbench Development: Skilled in designing efficient testbenches and regression suites.Debugging & Analysis: Strong problem-solving abilities with a keen eye for detail in identifying and resolving complex issues.
Experience
Design Verification Engineer
May 2025 — Present
Education
Dharmsinh Desai University
B.E., Electronics & Communications
2006 — 2010
Skills
- Apb
- Verilog
- Modelsim
- Ethernet
- Semiconductors
- Uvm
- Ovm
- System Verilog
- Amba Axi
- Digital Electronics
- Ddr
- Perl Script
- Universal Verification Methodology (Uvm)
- Functional Verification
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